This is a report to the sponsors of the Semiconductor Technology Program on work during the thirty-first and thirty-second quarters of the Program. It summarizes work on a wide variety of measurement methods for semiconductor materials, process control, and devices that are being studied at the National Bureau of Standards. The Program, which emphasizes silicon-based device technologies, is a continuing one, and the results and conclusions reported here are subject to modification and refinement.

The work of the Program is divided into a number of tasks, each directed toward the study of a particular material or device property or measurement technique. This report is subdivided according to these tasks. Highlights of activity during the reporting period are given in section 2. This section provides a management-level overview of the entire effort. Subsequent sections deal with each specific task area. References cited are listed in the final section of the report. The report of each task includes a narrative description of progress made during this reporting period. Additional information concerning the material reported may be obtained directly from individual staff members identified with the task in the report. Organizational locations and telephone numbers for Program staff members are given in Appendix A.

Background material on the Program and individual tasks may be found in earlier progress reports as listed in Appendix B. From time to time, publications are prepared that describe some aspect of the program in greater detail. Current publications of

this type are also listed in Appendix B. Reprints or copies of such publications are usually available on request to the author. In addition tutorial videotapes are being prepared on selected measurement topics for dissemination to the electronics community. Currently available videotapes and procedures for obtaining them on loan are also listed in Appendix B.

Communication with the electronics community is a critical aspect both as input for guidance in planning future program activities and in disseminating the results of the work to potential users. Formal channels for such communication occur in the form of workshops and symposia sponsored or co-sponsored by NBS. At the present time, no such seminars and workshops are scheduled. However, the availability of proceedings from past workshops and seminars is indicated in Appendix C.

An important part of the work that frequently goes beyond the task structure is participation in the activities of various technical standardizing committees. The list of personnel involved with this work given in Appendix D suggests the extent of this participation. In most cases, details of standardization efforts are reported in connection with the work of a particular task.

Technical services in areas of competence are provided to other NBS activities and other government agencies as they are requested. Usually these are short-term, specialized services that cannot be obtained through normal commercial channels. To indicate the kinds of technology available to the Program, such services provided during the current reporting period are listed in Appendix E.

Highlights of progress in the various technical task areas of the Program are listed in this section. Particularly significant accomplishments during this reporting period included:

(1) development of theoretical expressions for electron mobility in silicon based on combinations of scattering mechanisms;

(2) successful low-temperature processing of MOS capacitors to permit measurement of thermally stimulated current and capacitance without subjecting the specimens to potentially degrading heat treatments;

(3) completion of a study of the thermodynamics of reactions in an oxidation furnace tube which provides a basis for models of the effect of water vapor, chlorine, and tube wall conditions on sodium contamination levels;

(4) development of a rapid, nondestructive method for reverse decoration of defects in passivation overcoats;

(5) development of the theoretical basis for accurate measurement of small line widths by analysis of a spatially filtered image of the line;

(6) extension of the acoustic emission technique to the nondestructive testing of tape-bonded chips and hybrid components; and

(7) analysis of the results of a first exploratory interlaboratory evaluation of the radioisotope method for testing hermeticity of semiconductor devices.

New tasks were undertaken to develop techniques for measuring resistivity uniformity of and non-dopant impurities and defects in power-device grade silicon and to investigate the particle impact noise detection method for screening devices for the presence of loose particles in the package; initial results were obtained in the study of scanning acoustic microscopy which was begun during the previous reporting period. Because of technical limitations in the methods, efforts to develop both the automated scanning low energy electron probe and in-process ultrasonic bond monitor were terminated.

Unless another organization is identified, the work described in the following paragraphs was performed at the National Bureau of Standards.

Materials Characterization by Electrical Methods An extensive matrix experiment was car

ried out to examine the conditions under which the sheet resistance of very thin junction-isolated silicon layers could be measured reliably by the four-probe method. In contrast to the less promising results of an interlaboratory pilot study, conducted in cooperation with ASTM Committee F-1 on Electronics, the results of these experiments showed that better than 1 percent repeatability is feasible if measurement conditions are properly controlled. An interlaboratory test to verify this conclusion is now being conducted in cooperation with Committee F-1.

Experiments to determine the effects of specimen surface preparation and probe material on the empirical relation between silicon resistivity and spreading resistance were continued with the study of surfaces mechanically polished with 0.3-um alumina in an aqueous slurry. Anomalous results were obtained on (111) n-type surfaces; satisfactory results were obtained on (111) p-type and (100) ntype surfaces.

As a preliminary test of the application of a simplified calculational procedure being developed at Solecon Laboratories for correcting spreading resistance data on layers with nonuniform resistivity, the dopant profiles of two boron-diffused layers were measured by the spreading resistance method and by the incremental sheet resistance method and compared. The relatively close agreement obtained suggests that the parallel superposition approach is quite accurate for diffused structures with junction depths less than 2 um. Discrepancies near the surface could be accounted for on the basis of bevel-rounding effects.

Work on the bulk photovoltaic effect was resumed with emphasis on the application of this method to evaluation of resistivity variations along the diameter of circular slices suitable for fabrication of high-power thyristors and rectifier diodes. An automated data collection and analysis system for making photovoltaic measurements has been designed and assembled. Subsequently, the resolution of this technique is to be compared with that of the spreading resistance method.

As part of the continuing experimental redetermination of the resistivity-dopant density relation (Irvin's curves), additional measurements of room-temperature resistivity and dopant density were made on silicon wafers doped with phosphorus. In addition, initial measurements were made on silicon wafers

doped with boron. In general the electron mobilities lie above those based on Irvin's data and the hole mobilities lie below those reported by Wagner.

Theoretical expressions have been developed for the electron mobility in silicon as a function of temperature and dopant density. By incorporating the effects of electronelectron scattering and scattering anisotropies in the mobility calculation, good agreement between theory and experiment for both electron mobility and resistivity was obtained for phosphorus-doped silicon slices with dopant density of 1014 to 3 x 1018 cm-3 over the temperature range 100 to 500 K.

A new task has been undertaken to examine the range of validity of the Schottky equations (based on the depletion approximation) which are commonly used to extract dopant density from capacitance-voltage data. Numerical solutions to boundary value problems based on the carrier transport equations or Poisson's equation are being developed to provide a basis for comparison. Among the questions to be studied explicitly are: (1) what is the correct definition of junction capacitance in terms of field quantities such as electric field and electron and hole densities? and (2) is the quantity derived from capacitancevoltage data by the Schottky equation the equilibrium free-carrier density or the impurity (dopant) density in the depletion region? A new task has been initiated to study the thermally stimulated current and capacitance response of silicon suitable for fabrication of high-power thyristors and rectifier diodes. Initial work has concentrated on the development of apparatus for making the measurements at the wafer level and evaluation of lowtemperature procedures for fabrication of MOS capacitors. Early results suggest that capacitors fabricated with a silicon dioxide layer chemically vapor deposited at 400°C and an electron-beam (e-gun) evaporated aluminum gate, microalloyed in dry nitrogen at 400°C, are suitable for thermally stimulated current and capacitance measurements. It was also demonstrated that such measurements can be made at the wafer level in a dry nitrogen atmosphere; an improved apparatus for this purpose was designed and assembled. The results of preliminary experiments suggest that it may be possible to make thermally stimulated current and capacitance measurements even in capacitors with oxides contaminated by relatively large densities of mobile ions provided that the mobile ions are driven to the metal-oxide interface. In related work, the

emission temperatures of a number of impurity and defect centers in silicon were calculated as a function of heating rate with the use of data compiled from literature.

Design and evaluation work on the modified instrument for measuring capacitance at applied voltages of up to 10 kV has been completed at RCA Laboratories. In an application of this instrument, it was shown that a large positive charge develops at the silicon-sapphire interface during e-gun metallization and that annealing at 400°C in forming gas does not entirely remove this charge. The extendedrange measurement technique was refined to permit measurement of conductance as a function of voltage in addition to capacitance. Materials Characterization by Physical Analysis Methods Development of calibration standards for ion microprobe mass analysis continued at Texas Instruments with emphasis on improved masking techniques for fabricating the microvolume structures, preparation of implanted specimens, and collection of data. Preliminary results suggest that the smaller microvolume structures may be inappropriate for calibration artifacts. Consequently, future activities in this task are being directed toward collection of reproducibility data and refinement of procedures for calibrating standard specimens.

The rapid, nondestructive reflectance technique being developed at RCA Laboratories to determine the surface quality of sapphire substrates was extended to ultraviolet wavelengths. The reflectance characteristics of silicon-on-sapphire composites could be correlated with the surface roughness of the silicon film.

The impurity content of three sapphire substrates was determined by neutron activation analysis. These measurements were made to assist an Air Force contractor in studying the influence of impurities transferred from the sapphire substrate to the silicon film on the properties of silicon-on-sapphire devices.

A study was made of the effect of ion flux distribution in Auger/ion beam profiling of oxide-silicon structures at Stanford University. It was shown that ion flux inhomogeneities can be a limiting factor in depth resolution. Apparent interface broadening was also shown to occur in the presence of enhanced sputtering as a result of electronstimulated desorption of oxygen from the oxide. In related work at Varian Associates, the crater edge formed by ion beam etching