MOS transistor (circular), structure 3.15, consists of base diffusions which serve as source, S1 and S2, and drain, D1 and D2, and a gate, G. This structure, being circular, has an edgeless gate region which simplifies the geomettrical calculation associated with the current flow. The effective photomask W/L ratio is 2π/ln (R2/R1) where the inside radius of the drain, R2, is 12 mil (305 μm) and the radius of the source, R1, is 8.5 mil (216 um), so that W/L = 18.22. The source and drain regions have dual metal contacts that allow fourterminal measurements of the inversion region channel mobility. From the measurement of the low voltage transconductance, Go IDS/VDS, as a function of gate voltage, VGs, the channel mobility, u, can be calculated from [31] = μ = (XocL/εOW) (AGO/AVGS) (26) where AVGS is the incremental change in the gate to source voltage, Xoc is the collector oxide thickness and co is the oxide dielectric constant. The gate oxide thickness may be determined from structure 3.29, section 8.1, or from structure 3.8, section 5.1, using Xoc = EOA/CO. 8. MISCELLANEOUS 8.1. Surface Profilometer Structure, Structure 3.29 Surface profilometer structure, structure 3.29, consists of a region where a mechanical stylus-type profilometer is used to evaluate various regions for process control and diagnostic purposes. The cross sectional drawing of this structure as shown below is a schematic view, for the silicon surface is shown flat. In fact the silicon surface does vary due to the incorporation of silicon into the oxide during various oxidation steps. (This is illustrated by the profile shown on page 38.) The surface contour over the base oxide is obtained from (A) and over the emitter oxide is obtained from (B). The surface contour of the silicon surface over collector, base, and emitter are obtained from (C). The thickness of various layers is determined from (D): Xoe is the oxide thickness over the emitter, Xob is the oxide thickness over the base, Xoc is the oxide thickness over the collector, and Xm is the metal thickness. For diagnosing the smallest geometry structure, 3.17, the critical portion of this structure is elongated in one direction as seen in (E) and (F). In (E) the oxide is removed and in (F) the metal is removed. A metal resolution pattern is seen in (G). Between each structure a metal marker is provided for easy identification of structures. 8.2. Etch-Control Structures 3.31 B, E, C, M Etch-control structures, structures 3.31 B, E, C, M, consist of squares offset by multiples of 0, 1, and 2 times 0.25 mil (6.4 μm). The layout of the BASE, EMITTER, and CONTACT oxide etch structures is identical; for these structures over-etch causes the squares to increase in size. This effect is illustrated in figure 5. The layout of the METAL etch structure is different, for over-etch causes these squares to decrease in size. The alignment of the sides of adjacent squares indicates that the over-etch is between 0 and 0.125 mil (3.2 μm) or between 0.125 mil (3.2 μm) and 0.25 mil (6.4 μm) or greater than 0.25 mil (6.4 μm). As illustrated in figure 5, the amount of over-etch is 0.125 mil (3.2 μm). These patterns provide a rapid visual indication of over-etch problems, since the amount of over-etch is easily determined. 3.31M 8.3. Resolution Structures, Structure 3.32 B, C, M Resolution structures, structurés 3.32 B, C, M, consist of offset rectangles which are spaced in multiples of 1, 2, 3, and 4 times 0.25 mil (6.4 μm). This pattern is found on the BASE, CONTACT, and METAL masks and indicates the quality of the photolithographic and etching processes. Alignment markers, structures 3.4 N, P, consist of concentric squares whose sides differ by 0.5 mil (13 μm). Two markers are present; one for use with positive photoresist, indicated by a P, and another for use with negative photoresist, indicated by an N. NBS logo, structure 3.5, consists of the symbols NBS formed in the metalization. NBS 9. AN n-p-n TRANSISTOR FABRICATION PROCESS Recall that the main objective of this test pattern is to evaluate the resistivity-dopant density relation in n- and p-type bulk silicon over the -3. dopant density range from less than 1014 to above 1020 cm To accomplish this task an n-p-n transistor process and a p-n-p transistor process were developed. To illustrate the use of this pattern the n-p-n transistor process is described. The fabrication process is outlined in table 2 which indicates the steps in the fabrication of an n-p-n transistor in a bulk, (111) oriented, nominally 10 .cm, n-type silicon wafer. Target values are shown for the sheet resistance, Rs (/), the junction depth, Xj (um), and the layer thickness, X(nm). In the fabrication process four photomasks were used: BASE (modified), EMITTER, CONTACT, and METAL. The wafer is also metallized on the backside to reduce the backside contact resistance. The cleanup steps involve an ammonium hydroxide-peroxide mixture followed by a hydrochloric acid-peroxide mixture [32]. The flow rate for steps 2, 5, 6, 9, 14 and 26 is 500 cm3/min. The flow rates for step 12 are 3265 cm3/min of N2, 35 cm3/min of 02, and 200 cm3/min of PH3. W = wet. = 200 |