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be bad metallization on that particular pad or post, bad wire, excessive unwanted motion during the bonding cycle, or even an incorrect bonding schedule. The result is that even if there is enough room left on the pad and a bond can be made to stick, there would be no assurance that it will be a good bond.

Poor metallization was frequently observed on the package leads of the devices examined. Figure 21a shows the metallization of a finger on a flat-pack. The area in which the bond is placed is extremely rough. There is a wide variation in texture across the finger and in a portion the metallization has actually peeled off. While roughness in the metallization surface is not necessarily difficult to deal with in bonding, variation in this roughness from bond to bond or package to package is a problem. Since the proper bonding parameters (power, time, and pressure) depend strongly on the surface texture, they cannot be at optimum settings for both extremes in surface texture. Therefore as this texture varies from package to package there will be a resultant variation in the character of the bond.

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The variation in surface quality of the bonding areas of the packages was greater for the transistor-type packages examined than it was for the flat-packs and other integrated circuit packages. The integrated circuit frames were normally coated with evaporated aluminum which tends to be more uniform than the tumble plated gold on the transistor posts. Figures 21b and 21c show the gold plated post metallization of two transistor packages. In Figure 2lb the metallization is very rough and hard. So hard, in fact, that instead of the bond being formed by the mutual deformation of the wire and the metallization, the wire was merely mashed flat over the irregular metallization. This can be seen in the surface texture of the bond which shows cracks with angles which are similar to the angular features of the metallization below. In Figure 21c there are many holes in the surface of the metallization. This was also true for the other post of this package and, to a lesser degree, for several other transistors examined. Since these holes affect the texture of the metallization, they would seem to be detrimental to wire bonding. Also, since they exist to some extent on the rest of the package surfaces, such as under the die, they might also present a problem during die bonding because the holes could entrap gas as the bond was being made.

6. OTHER OBSERVATIONS

The primary purpose of this investigation was to study the wire bonds of the devices examined. However, occasional examples of other possible reliability problems were observed. Some of these have an indirect bearing on wire bonding. The metallization faults encountered were primarily scraping or scratching of metallization stripes. The area marked with an "S" in Figure 22a exhibits evidence of scraping and that which is marked "E" shows holes in the metallization where material was etched away. The dielectrically isolated circuit shown in Figure 22b illustrates the difficulty in running a metallization stripe over a raised area. The damage to the metallization may have occurred when the wafer was broken into individual circuit dice since it is then that the die surface often comes into contact with a hard surface. Figure 23a shows another example of a metallization stripe 0.001 in (25 μm) where some of the material has been etched away, but here the stripe is almost etched entirely away at one point. It is shown in a higher magnified view in Figure 23b. Also illustrated in Figure 23 is the thinning in the metallization placed over a step in the oxide. The obvious problem with any of such imperfections in metallization interconnections is the possibility of electrical open-circuits. Another metallization defect, shown in Figure 24, is the presence of small metal pieces which could become loose after packaging and could possibly cause an electrical short between two metallization stripes.

Improper placement of the die during die bonding can cause difficulties when the device is wire bonded. Figure 25 shows a case where the wires are unnecessarily long and where there exists the possibility of the wires touching one another. Bad placement of the wire bonds on a transistor could also cause an electrical short. Figure 26a shows a

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Figure 21. Defective package metallization. In (a) the metallization is actually peeling off of the finger of a flat-pack. In addition there is a great variation in the texture of the metallization across the lead. The examples in (b) and (c) are posts of transistortype packages. The metallization in (b) is very hard and irregular as indicated by the impressions extending through the bond. The metallization in (c) is full of holes.

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Figure 22. Examples of damaged metallization. In (a) some metallization seems to have been scraped away (S) while some other seems to have been etched away (E). In (b) the metallization over the humps in a dielectrically isolated device has been damaged.

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Figure 23. Over-etching of a metallization stripe. A portion of a circuit is shown in (a) with the region indicated by the arrow shown at greater magnification in (b).

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