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Figure 4(a)

The switching transient (upper trace) at output of diode bridge when it is turned "on" by the gating voltages (lower traces).

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Same as 4(a) except for lower scope sensitivity on upper trace.

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Figure 4 (c)

Bridge output response (upper trace) to -5V input pulse (lower trace). Bridge turn-on coincides approximately with the -5V to OV transition.

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Figure 5.

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Module of diode bridge and gate pulse circuits and the mainframe in which it is used.

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TRIGGER

IN

SHORT

TIME

DELAY

MEDIUM
TIME
DELAY

+5V

LONG

TIME

DELAY

+5V

10K

WINDOW

DURATION

CIRCUIT

TO
GATE PULSE

CIRCUIT

+5V

Figure 7

Schematic diagram of delay and window circuits

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