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overshadowed by an even greater jump to LSI circuitry. This new jump will result in 100-gate and then 1000-gate circuit modules which are little larger in size or higher in cost than the present four-gate integrated circuit modules." (Savitt et al., 1967, p. 87).

6.89 "Discrete components have given way to integrated circuits based on conventional etched circuit boards. This fabrication technique is in turn giving way to large scale integration (LSI), in which sheets of logic elements are produced as a unit." (Pyke, 1967, p. 161).

"The initial results suggest the possibility of fabricating, in one step, a complete integrated circuit with all the passive elements. Such a process would start with a metallized substrate and would use a programmable laser and work stage. Complete laser fabrication of hybrid circuits will require a process in which a metal film is removed selectively, exposing a different film. For example such a process may be necessary in order to remove the conductor and expose the resistor film.

"In the present tantalum-chrome-gold technology such a selective removal of the gold presents substantial difficulties because the reflectivity of the gold is much greater than that of the tantalum nitride. It is quite probable, however, that some combination of films will be found for which the upper film can be removed from the resistor without damaging it." (Cohen et al., 1968, p. 402).

6.90 "Integrated circuits (more importantly, large scale integration (LSI) which involves numerous integrated circuits tied together on the same chip) offer the best promise from the standpoint of size, reliability and cost [for scratch-pad memories]." (Gross, 1967, p. 5).

6.91 "Of all the potential applications of largescale integration, new memory techniques are the most startling. Ferrite core memories have just about reached their limit in terms of access speeds required for internal scratchpads. Magneticthin films, while fast enough, are too costly. Studies show that because of LSI, semiconductor memories are less costly than any other approach for speeds from 25 to 200 nanoseconds and for capacities up to 20,000 bits-just the range required by scratchpads." (Hudson, 1968, p. 41).

6.92 "In addition to being used for circuitry, LSI techniques apply to the construction of memories, since some of the new memory elements mentioned above can be fabricated using the micro-construction techniques. The possibility also comes to mind of fabricating both the comparison circuitry and the memory cells of a contentaddressable memory into a single unit. Thus the development of of large-scale integration holds considerable promise for improving computer hardware." (Van Dam and Michener, 1967, p. 210). 6.93 "In view of the economy that should accompany widespread use of LSI, it may become less expensive to use LSI logic elements as main

memory elements, at least for some portion of primary storage. Even today some systems have scratchpad memories constructed of machine logic elements, so that the fast processor logic is not held back by the slower memory capability." (Pyke, 1967, p. 161).

6.94 "LSI memories show considerable potential in the range of several hundred nanoseconds down to several tens of nanoseconds. In contrast with logic, LSI memory is ideally suited to exploit the advantages and liabilities of large chips: partitioning is straightforward and flexible, a high circuit density can be obtained with a manageable number of input-output pads, and the major economic barriers of part numbers and volume which confront LSI logic are considerably lower. Small-scale memory cell chips have already superseded film memories in the fast scratchpad arena; the depth of penetration into the mainframe is the major unresolved question." (Conway and Spandorfer, 1968, p. 837).

6.95 "As technological advances are made, the planar technology permits us to pack more and more bits on a single substrate thus reducing the interconnection problem and simplifying the total memory packaging job. This integration will reflect in the long run on product cost and product reliability." (Simkins, 1967, p. 594).

6.96 "The new technology has a number of problems whose solution can be facilitated by arranging the circuitry on these arrays in a 'cellular' form- that is, in a two-dimensional iterative pattern with mainly local intercell connections that offers such advantages as extra-high packing density, ease of fabrication, simplified testing and diagnosis, ease of circuit and logical design, the possibility of bypassing faulty cells, and particularly an unusually high flexibility in function and performance." (Kautz et al., 1968, p. 443).

6.97 "LSI offers improvements in cost and reliability over discrete circuits and older integrated circuits. Improvement in reliability is due to the reduction of both the size and the number of necessary connections. Reductions in cost are due largely to lower-cost batch-fabrication techniques. One problem in fabrication is the increased repercussion of a single production defect, necessitating the discarding of an entire integrated component if defective instead of merely a single transistor or diode. This problem is attacked by a technique called discretionary wiring; a computer tests for defective cells in a redundantly constructed integrated array and selects, for the good cells, an interconnection pattern that yields the proper function." (Van Dam and Michener, 1967, p. 210).

[blocks in formation]

ing design, maintenance philosophy, flexibility and functional logic segmentation." (Hobbs, 1966, p. 39).

"The rapid and widespread use of integrated circuit logic devices by computer designers, coupled with further improvements in semiconductor technology has raised the question of the impact of Large Scale Integration (LSI) on computer equipment. It is generally agreed that this is a very complex problem. The use of Large Scale Arrays for logic require solutions to the problems such as forming interconnections, debugging logic networks, specifying and testing multistate arrays, and attempting to standardize arrays so that reasonable production runs and low per unit design costs can be obtained." (Petschauer, 1967, pp. 598-599).

"The advent of large-scale integration and its resultant economy has made it clear that a complete re-evaluation of what makes a good computer organization is imperative. Methods of machine organization that provide highly repetitive logical subsystems are needed. As noted previously, certain portions of present computers (such as successive stages in the adder of a parallel machine) are repetitive; but others (such as the control unit) tend to have unique nonrepetitive logical configurations." (Hudson, 1968, p. 42).

6.98 "Graceful performance degradation through use of majority voting logic.

"LSI will allow a single logical element to be replaced by several logical elements in a manner such that the elements can be used to determine the state or condition of a situation. The state or condition of the situation indicated by a majority of the elements can be accepted as valid - hence, majority voting logic." (Walter et al., 1968, p. 52.)

"Because of low cost modules, pennies and less per logic function, maintenance will be simplified and maintenance cost will be reduced by using throw-away modules. By 'wiring' the spares in, fabricated on the same LSI wafer that they are sparing, it becomes practical to self-repair a computer. This is accomplished by including diagnostic logic (coupled with programs) to effect the self-repair. Such a self-healing computer system, using electronic surgery, need only be manually maintained when its spare parts bank becomes exhausted. Some advantages of selfrepair are:

Increased system reliability

Continuous operation (system always available)

● Long term (years) remote system operation without manual repair

Considerable reduction in maintenance costs." (Joseph, 1968, p. 152).

6.99 See, for example, Rajchman (1965) and Van Dam and Michener as follows: "However, new memory elements, such as plated wires, planar thin films, monolithic ferrites, and integrated circuits, are becoming competitive. One

advantage of these new elements is that a memory array made with them can be batch-fabricated in one step, leading to simpler, lower-cost production (the production of core memories requires making the magnetic cores and then stringing the cores together to make a memory). Another advantage appears to be in memory speed. The new memory elements have taken over the fields of high-speed registers and temporary 'scratchpad' memories. Integrated circuitry . . . will probably replace the planar magnetic thin-film currently used for high-speed registers; however, the planar film will be extended to intermediatesized stores (105-106 bits)." (Van Dam and Michener, 1967, p. 207).

6.100 "Today most common types [of core memories] have about a million bits and cycle times of about one microsecond, with bigger and faster types available. Capacity and speed have been constantly increasing and cost constantly decreasing." (Rajchman, 1965, p. 123).

"The ferrite core memory with 106 bits and lu sec cycle time is the present standard for main memories on the computer market. Larger memories up to 20.106 bits at 10μ sec cycle time have already been announced." (Kohn, 1965, p. 131).

"Ferrite cores dominated the main memory technology throughout the second generation. Most, although not all, of the third generation machines thus far announced have core memories." (Nisenoff, 1966, p. 1825).

6.101 "The NCR 315 RMC (Rod Memory Computer) has about the fastest main memory cycle time of any commercial computer yet delivered-800 nanoseconds. The unique thin-film memory is fabricated from hairlike berrylliumcopper wires plated with a magnetic coating. In the Rich's system the 315 RMC processes data from over 100 NCR optical print cash registers . . .” (Data Proc. Mag. 7, No. 11, 12 (1965)).

A later version of NCR's rod-memory computer, the 315-502, adds multiprogramming capability at an 800 nanosecond cycle time. (Datamation 12, No. 11, 95 (Nov. 1966)).

"NCR's new thin-film, short-rod memory represents one of the most significant technical innovations in the Century series . . . The rods are made by depositing a thin metallic film and then a protective coating on 5-mil copper wire. This process yields a plated wire 0.006 inch in diameter, which is then cut into 0.110-inch lengths to form the 'bit rods'. The basic memory plane is formed by inserting the bit rods into solenoid coils wound on a plastic frame. Then the entire plane is sealed between two sheets of plastic. Automated processes are used to plate the wire, cut the rods, wind the solenoid coils, insert the rods into the solenoids, and seal the planes. The result is a high-performance memory at an unusually low bit cost." (Hillegass, 1968, p. 47).

6.102 For example, "laminate-diode memories

of millions of bits operating in less than one microsecond seem possible in the near future." (Rajchman, 1965, p. 125).

"The cryotrons, the memory structure, and all connections are constructed by a single integrated technique. Thin films of tin, lead and silicon monoxide are evaporated through appropriate masks to obtain the desired pattern of lines. The masks are made by photoforming techniques and permit simple fabrication of any desired intricate patterns.

"The superconductive-continuous sheet-cryotronaddressed approach to large capacity memory offers all the qualities, in its principle of operation and its construction, to support ambitions of integration on a grand scale as yet not attempted by any other technology. No experimental or theoretical result negates the promise . . . There is, however, a serious difficulty: The variation of the thresholds of switching between elements in the memory plane." (Rajchman, 1965, p. 127).

6.103 "A planar magnetic thin film memory has been designed and built by Texas Instruments using all integrated circuits for electronics achieving a cycle time faster than 500 ns, and an access time of 250 ns. The memory is organized as 1024 words by 72 bits in order to balance the costs of the word drive circuits against the sense-digit circuits. The inherent advantage of this particular organization is that the computer can achieve speed advantage not only because of a fast repetition rate, but also because four 18 bit words are accessed simultaneously. (Comparable core memory designs are ordinarily organized 4096 words of 18 bits each.) The outlook is for higher speed (faster than 150 ns) memories in similar organizations to be developed in planar magnetic films. The cost of these memories will be competitive with 2-1/2 D core memories of the same capacity but the organization and speed can be considered to offer at least a 4:1 improvement in multiple word accessing and a 3:1 improvement in speed. As a result of this, more computers will be designed to take advantage of the long word either by extending the word length of the computer itself or by ordering instructions and data in such a manner that sequential addressing will be required a large percentage of the time." (Simpson, 1968, pp. 1222-1223).

6.104 "If the high-speed memory is to operate at a cycle time in the 100-nanosecond region, the class of storage elements that can be used is somewhat limited. Storage elements capable of switching speeds compatible with 100-nanosecond cycle times include (a) thin magnetic films of several types, (b) some forms of laminated ferrites, (c) tunnel diodes, and (d) semiconductor flip-flop type devices." (Shively, 1965, p. 637).

6.105 For example, "most forms of thin films and laminated exhibit adequately fast switching times, but the drive current requirements are large

and the readout signals small." (Shively, 1965, p. 637).

"The thin film transistor is barely emerging from the laboratory and it may require several years before it becomes a serious contender for integrated-all-transistor-random-access-memories of large capacities." (Rajchman, 1965, p. 126).

"The development of higher-speed conventional memory devices, of cores and thin films, has slowed, and progress with such devices in breaking the hundred nanosecond barrier will probably take some time." (Pyke, 1967, p. 161).

"Thin films appeared to be more hopeful and are certainly an area where extensive research is being carried out. The main problems still appear to be those of production, especially the problem of achieving reproduceability from one film to another." (Fleet, 1965, p. 29).

"The development of Cryogenic memories has reached the point where planes storing several thousand bits can be fabricated with high yield. However, there are still many problems, such as interconnections, cost, data rate, etc., to be solved before considering a mass store large enough to justify the overhead of cryostat and dewar." (Bonn, 1966, p. 1869).

"Key problems in the fabrication of large monolithic memories are reliability (what to do if a bit fails) and the volatility of the monolithic cell (if the power goes off, the information is lost)." (Henle and Hill, 1966, p. 1859).

6.106 Kohn points out, for example, that “at present, such optically addressed memories seem to be capable of storing 105 . . . 106 bits/sq in. to have about 0.1 μ sec read access time, and one cell can be written in 100 μ sec. Very high voltages for the light switches are required. This appears to be quite unfavorable from a technical point of view; however, an intensive materials research may overcome the weakness of electrooptic effects and lead to more realistic devices." (Kohn, 1965, p. 133).

6.107 "In the subsystems of a large computer, one serious problem is ground plane noise - spurious signals generated by large currents flowing in circuits which have a common ground. . . Another noise nuisance arises when signals have to be coupled from two subsytems which are operating at two widely different voltages. Lumped together, such difficulties are known as the 'interface problem'." (Merryman, 1965, p. 52).

6.108 "Superconductive cryogenic techniques, which were advocated for quick, on-line storage, will probably not become operational because of the high costs of refrigeration." (Van Dam and Michener, 1967, p. 207).

6.109 "The projected 'break-even' capacity, including refrigeration cost, for a cryoelectric memory is approximately 10 bits." (Sass et al., 1967, p. 92).

"The cryoelectronic memory is made up of

376-411 O-70-8

strip lines, which, though interconnected from plane to plane, display low characteristic impedance and high propagation velocity, and require modest peripheral electronics. Therefore, propagation velocity is the only real limit to memory cycle time. Typical cycle time for the 108-bit AB system . . is approximately 1 us." (Sass et al., 1967, p. 97). 6.110 "The use of small special purpose memories has become prevalent in recent years. The Honeywell H-800 employed a small core memory to permit multiprocessing as far back as 1960." (Nisenoff, 1966, p. 1826).

6.111 "Much interest has recently been shown in the computer art in incorporating a low-cost, mechanically changeable, read-only store in the control section of a central processing unit. Flexibility of organization and compatibility with other systems can be built into a computer that has a readily changeable read-only store. The printed card capacitor Read-only store is one of three technologies selected for the ROS function in System/360." (Haskell, 1966, p. 142).

"The Read Only Store (ROS) memory is a prewired set of micro-instructions generally set up for each specific application. This means that the specifications of the computer may be tailored to suit the specific application of the user. Thus in an application where square root or some other special function must be performed rapidly or repeatedly, such a sequence of operations may be hard wired into the ROS." (Dreyer, 1968, p. 40). "Micro-steps, the basic instructions of a stored logic computer, permit the programmer to control the operation of all registers at a more basic level than is possible in the conventional computer. Sequences of micro-steps (each of which requires only 400 nsec to perform) are stored in the ROS as 'micro-routines' which are executed much as a conventional subroutine. However, unlike the unalterable commands of the conventional computer, stored micro-routines may be designed by the programmer to form the most efficient combination of basic computer logical operations for a given application. The speed increase available by use of a ROS does not come from faster computing circuits, but from operating instructions built into the hardware for more efficient ordering of gates, flipflops, registers et al. Thus at the outset of each application, tradeoff studies must be made to determine to what extent software may be replaced by hardware through use of the ROS." (Dreyer, 1968, p. 41).

"The implementation of read-only memories as the control element in a computer has significance for maintainability and emulation. Instruction decoders and controls present a difficult problem to the designer. These elements contain no repetitive patterns like those in data paths and arithmetic units. In addition, they have many external connections. A read-only memory can be used to provide these same control signals. It would contain a long list - hundreds or thousands of microinstruc


tions. Each program microinstruction from the main memory addresses a sequence of microinstructions in the read-only memory. Each microinstruction in the sequence describes the state of the entire machine during its next cycle. The read-only memory divides easily into segments, since its only external connections are the words address inputs and control signal outputs. LSI read-only memories are being offered by several manufacturers." (Hudson, 1968, p. 42).

"If a read only-memory (ROM) module were used to store subroutines, the relative-efficiency of the code would be much less important. ROM modules cost less than one-fifth as much as comparable amounts of main core storage. Use of ROM to 'can' bread and butter subroutines in lowcost hardware provides an effective solution to a particular problem. The main or read/write memory, thus liberated, can be used to provide feasible flexibility for the main program and to incorporate inevitable, unforeseen, jobs that arise during the development and operating life of a computer system.

"One of the most significant aspects of fourth generation computers will be the use of read-only memories. Tradeoffs of hardware for software and/or speed, and/or reliability, will significantly affect computer organization. Advantages to be gained through the use of ROM include (1) increased speed, output signal level and reliability, (2) decreased read-cycle time, operating power, size, weight, and cost, and (3) nonvolatility." (Walter et al., 1968, pp. 51, 54).

"The 'read-only' function includes the storage of indirect accessing schemes, the implementation of logic functions, the storage of microprogrammed instructions, and related applications." (Chapman and Fisher, 1967, p. 371).

"The attractions of a good read-only storage include not only extremely reliable nondestructive readout, but also lower cost." (Pick et al., 1964, p. 27).

"Special hardware functions implemented in the read-only memory of the 70/46 supplement the [address] translation memory. They are used as additional privileged instructions. Among the capabilities they provide are the ability to load or unload all or selected parts of translation memory and to scan translation memory in such a way that only the entries of those pages that have been accessed are stored into main memory." (Oppenheimer and Weizer, 1968, p. 313).

6.112 "A MYRA memory element is a MYRi Aperture ferrite disk which, when accessed, produces sequential trains of logic-level pulses upon 64 or more otherwise isolated wires . . . A picoprogrammed system, then, consists essentially of an arithmetic section and a modified MYRA memory. A macroinstruction merely addresses an element in the MYRA memory; when the element is accessed, it produces the gating signals which cause the arithmetic unit to perform the desired

functions. In addition, it provides gating pulses which fetch the operand (if needed), increment the control counter, and fetch the next instruction." (Briley, 1965, p. 94).

"Picoprogramming is realized by the use of the MYRi-Aperture (MYRA) element, a multiaperture ferrite device which is the basic building block of the instruction mode. Each instruction module is a complete entity and is fabricated on a conventional printed wiring card that can be inserted in a conventional PC connector. Incorporation of a new instruction in the computer or alteration of an existing one is accomplished by the addition or substitution of the appropriate instruction module card." (Valassis, 1967, p. 611).

6.113 "With this GaAs diode array system a very fast, medium capacity, read-only memory with changeable contents becomes realizable. Since many of the existing third generation computers contain microinstructions in read-only stores of about the same capacity as that indicated for the diode-accessed holographic memory, it would seem that the existing read-only memories could be replaced by this type of holographic memory; such a system could be an order of magnitude. faster and allow for increased flexibility of CPU configuration by easy change of the microinstruction repertoire." (Vilkomerson et al., 1968, p. 1198). 6.14 In general, these terms are interchangable. Some typical definitions are as follows: "Basically an associative memory involves sufficient logical capability to permit all memory locations to be searched essentially simultaneously-i.e., within some specified memory cycle time . . . Searches may be made on the basis of equality, greater-thanor-equal-to, less-than-or-equal-to, between limits, and in some cases more complex criteria." (Hobbs, 1966, p. 41).

"An associative memory which permits the specification of any arbitrary bit pattern as the basis for the extraction of the record within which this pattern appears is called a fully associative memory." (McDermid and Petersen, 1961, p. 59).

"The content-addressable memory (CAM) was initially proposed by Slade as a cryogenic device .. For this type of memory, word cells are accessed by the character of stored data rather than by physical location of the word cell. The character of data is evaluated in parallel throughout the memory. A common addressing characteristic is equality of stored data and some externally presented key. Memories of this type have also been called associative since a part of the cell contents may be used to call other cells in an 'associative' chain." (Fuller, 1963, p. 2).

"An associative memory is a storage device that permits retrieval of a record stored within by referring to the contents or description rather than the relative address within the memory." (Prywes, 1965, p. 3).

"The distinguishing feature of an associative

memory is that it has no explicit addresses. Any reference to information stored in an associative memory is made by specifying the contents of a part of a cell. All cells in the memory which meet the specification are referred to by the statement." (Feldman, 1965, p. 1).

"We have described here an iterative cell which can be used as a content addressable memory from which an entry may be retrieved by knowing part of its contents." (Gaines and Lee, 1965, p. 74).

"Memory systems which retrieve information on the basis of a given characteristic rather than by physical location . . . are called 'contentaddressed', 'catalog', or 'associative'. In these types of memory systems, an interrogation word is presented to the memory and a parallel search of all words within the memory is conducted. Those stored words which have a prescribed relationship (e.g., equal to, nearest to, greater than, etc.) to the interrogation word are tagged. Subsequently, the multiple tagged words or responses are retrieved by some interrogation routine." (Miller, 1964, p. 614).

"Associative Memories. An associative memory is a collection of storage cells that are accessed simultaneously on the basis of content rather than location. The ability to associate with circuit logic those cells with similar contents achieves a hardware implementation of an associatively linked or indexed file. Sufficient quantitative results have not yet been developed to establish conclusively the merits of the hardware implementation as against software associative systems. A comprehensive study of hardware associative memory systems given by Hanlon should be read by those interested in this growing technology." (Minker and Sable, 1967, p. 129.)

6.115 "It is extremely unlikely that large fast associative stores will become practicable in the near future . . . We cannot expect associative stores to contribute to a solution of our problems other than in very small sizes to carry out special tasks, e.g., the page register addresses in Atlas." (Scarrott, 1965, pp. 137-138).

"The concept of the content-addressable memory has been a popular one for study in recent years, but relatively few real systems have used contentaddressable memories successfully. This has been partly for economic reasons-the cost of early designs of content-addressable memories has been very high- and partly because it is a difficult problem to embed a content-addressable memory into a processing system to increase system effectiveness for a large class of problems." (Stone, 1968, p. 949).

"Considerations of cost make it impossible for the associative memory to contain many registers, and the number that has been adopted in current designs is eight. Unless the associative memory has very recently been cleared, it will be necessary to suppress an item of information in order to make

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