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RESISTIVITY; DOPANT PROFILES

Results of a typical measurement are shown in figure 3 as a plot of dopant density against distance from the silicon-oxide interface. The specimen used was phosphorusdoped with a nominal resistivity of 1 cm. The wet oxide, grown at 1000°C for 150 min, had a nominal thickness of 500 nm. The aluminum gate electrodes were evaporated with an electron-beam evaporator and the wafer was annealed in nitrogen for 30 min at 500°C.

There are at least four sources of error in the profile which must be considered. First, at large depletion depths the C(t) curve is changing very slowly. The differentiation in this region is then very sensitive to random fluctuations in the C(t) curve; as a result there is likely to be appreciable scatter in the calculated dopant density at large distances from the interface, as can be seen in figure 3. Some improvement could be made by averaging over longer periods of time or by using a larger differentiation grid as the change in capacitance becomes small.

A second source of error is the effect of fringing fields on the MOS capacitor. For materials of relatively low dopant density (~ 1014 cm-3) depletion depths can be large (~ 10 μm). This causes a spreading of the electric fields away from the gate and could cause an increase in the measured capacitance. This edge effect is serious for devices where the maximum depletion depth is a finite fraction of the device radius. Typically, the presence of fringing fields causes the calculated dopant density to be larger than the actual dopant density; the error increases as the depletion depth increases.

The third source of error arises because of limitations in the simple depletion model. In the ideal case, depletion starts at the flat-band voltage. Experimentally, the capacitance near the flat-band voltage is always less than the theoretical depletion capacitance. Therefore, the calculated profile lies above the true profile near the flat-band condition until the true depletion regime is entered. In the example shown in figure 3, the first data point on the left corresponds to a voltage slightly more negative than the flat-band voltage so this error may be present.

The fourth source of error arises from the departure of the C-V characteristic from the

ideal as a result of fast interface states. Interface states contribute to the capacitance and will cause distortion or structure in the calculated profile. When present they exert their greatest influence in the surface region of the profile.

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One other point to be considered is the comparison of the dopant density as determined by the traditional C - C method (NBS Spec. Publ. 400-4, pp. 37-38) and that determined by the deep depletion method described here. The dopant density determined by the C с method is the average denmin sity within the equilibrium depletion depth. In figure 3 the horizontal and vertical arrows indicate the dopant density (N) and the equilibrium depletion depth (X) determined from this method. Note that the calculated density is significantly higher than the bulk density determined from the deep depletion technique which allows penetration of the space charge region much farther than the equilibrium high frequency technique which is employed in the C C method. min It is clear that the C

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determines a dopant density which is more characteristic of the surface region and may have little relation to the bulk dopant density. (R. Y. Koyama)

4.3. Mathematical Models of Dopant Profiles

This report outlines a finite difference algorithm [9] for the solution of the boron redistribution problem described previously (NBS Spec. Publs. 400-1, pp. 9-11, and 400-4, pp. 9-11). This algorithm consists of a set of algebraic equations whose solution approximates the solution of the partial differential equations which govern the boron concentration in the silicon and the silicon dioxide (NBS Spec. Publ. 400-1, eqs (4), (5), and (7), pp. 10-11).

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Figure 4.

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Finite difference grid used in solving boron redistribution problem.

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RESISTIVITY; DOPANT PROFILES

application of the finite difference technique. The grid used is depicted in figure 4. The mesh width At in the time domain and the mesh widths ▲y and Az in the silicon and the oxide respectively are coupled. In the oxide there are NL interior grid points (1, 2, ..., NL-1, NL) separated by Az. The position of the interface at the time (MM) At is denoted by z (MM), where MM is the number of time intervals since the beginning of the oxidation; the distance between (NL) Az and z (MM) varies. In the silicon the first full mesh width to the right of the interface Yo (MM) begins at (NR) Ay; the interior grid points (NR, NR+1, N2), spaced Ay apart, extend to (N2)▲y.

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In the oxide the approximate solution has the form C1 (nj▲z, k▲t) for 1 < n ≤ NL and k≥ 0 at the grid points and CB(1, z (kôt)) for k ≥ 0 at the boundary. In the silicon the approximate solution has the form C2 (n2▲y, k▲t) for NR ≤ n ≤ N2 and k≥ 0 at the grid points and CB (2, y(k▲t)) for k ≥ 0 at the boundary.

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CB (2, MM) = mCB(1, MM),

where m is the segregation coefficient, represent two equations in the unknown boundary values CB (1, MM) and CB (2, MM). These equations and the usual implicit equations associated with all the interior grid points form a linear algebraic system which can be solved by a variant of the well known method for treating tridiagonal systems [10]. To provide a bench mark comparison, this system was solved for several cases under conditions for which the analytic solution of Grove et al. [11] can be obtained. Table 2 lists a comparison between these solutions. If the segregation coefficient is substantially different from one, the value CB (2, z (k▲t)) calculated for a very short time after the oxidation begins is much larger than the value C2 (y(t)) calculated from the analytic solution. This is not unexpected since C2 (y (t)), which is independent of time, is not equal to C. Hence C2 (y(t),t) is discontinuous at time zero. The total time taken for the approximate solution to reach its steady state value depends on the time step employed; this time is shorter if the time step is smaller. (S. R. Kraft* and M. G. Buehler)

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4.4. Reevaluation of Irvin's Curves

Detailed experimental redetermination of the relationships between resistivity and dopant density in silicon (NBS Spec. Publ. 400-4, p. 13) was begun. The relationships as reported by Irvin [12] are in wide use throughout the industry; the graphical forms of these relationships are commonly known as Irvin's curves.

Preliminary data were obtained using appropriate test structures of Test Pattern NBS-3 (NBS Spec. Publ. 400-12, pp. 19-22) fabricated in three wafers of n-type (phosphorus doped) silicon. Bulk resistivity of the original n-type portion of the wafers was determined from measurements on structure 3.17, the collector four-probe resistor (sec. 7.3), corrected to 300 K [13]. Free carrier density was determined from measurements on structure 3.8, MOS capacitor over collector (sec. 7.4), or on structure

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RESISTIVITY; DOPANT PROFILES

3.10, base-collector diode (sec. 7.5). The results of these measurements are summarized in table 3.

The measurements made on the collector fourprobe resistor were very repeatable on a given device. The data reported in the table are averages for several devices in the same general area on the wafer.

The

The carrier density values from the MOS capacitor were determined by the deep depletion method (sec. 6.3). These values have an estimated uncertainty of ±5 percent. base-collector diode is located a little over 1 mm away from the MOS capacitor. Carrier density values were determined from the diode by the junction capacitance-voltage (C-V) method (NBS Tech. Note 788, pp. 9-11). A set of carrier density values from a diode had an average standard deviation of less than 1 percent. Because of the strong dependence of the calculated carrier density on the area of the base diffusion, the

diameter of the diffusion for this processing run was measured by photomicrographic procedures and found equal to the nominal value (432 um) within 1 μm.

The carrier density values from the junction C-V method were used for computing the mobility as this method is considered to be better characterized than the MOS procedure at this time. The mobility value calculated for each wafer is based on the average value of resistivity and carrier density. The mobility values for these wafers are about 5 percent larger than those calculated by the equation of Caughey and Thomas [14] which closely fits Irvin's curve for n-type silicon. However, these preliminary results suggest that the mobility calculated from the Caughey-Thomas equation agrees with the experimentally determined value within the estimated errors in the resistivity range studied. (W. R. Thurber, R. L. Mattis,

R. Y. Koyama, Y. M. Liu, and M. G. Buehler)

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