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2. HIGHLIGHTS

ticularly significant accomplishments ing this reporting period include (1) pletion of Hall effect measurements to ermine activation energies of the gold or and acceptor levels in silicon; (2) cessful direct measurement of fast intere state density with the circular CCD t structure; and (3) demonstration of the sibility of the use of acoustic emission a non-destructive means for testing indiual beam-lead bonds. Highlights of progs in these and other technical task areas listed below.

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ivation energies of both the gold accepand gold donor were found from Hall eft measurements on initially n-type siliwafers converted to p-type by the ition of gold.

The more precise value

id for the gold donor is in good agreet with the published values of others. obtain an accurate value for the gold eptor, it is necessary to determine the ›erature variation of the energy of the eptor level with respect to the band es; this in turn requires improved formufor calculating carrier mobilities in presence of charged impurity centers. se are being sought in connection with reevaluation of Irvin's curves, dissed previously; further work on the

rgy level model for gold will be deferred

so that the mobility problem can be attacked.

Oxide Film Characterization — Study of xray photoelectron spectra from the surface of air-stabilized silicon demonstrated the usefulness of the angular dependence of the intensity of spectral peaks in qualitatively locating the depth of surface impurities and determining the thickness of surface films. Other experiments on low-carbon silicon suggested that the previously observed carbon film arises from external sources and not from the surface or bulk of the silicon.

A series of measurements was initiated to compare various electron, ion, and photon beam measurement technologies for determination of impurities in silicon and silicon dioxide. In these preliminary measurements, ion implanted specimens are being used to provide a reasonably well known density of impurity at a reasonably well defined location. Boron and zinc implanted silicon and aluminum and sodium implanted silicon dioxide are being measured by ion microprobe mass analysis, ion scattering mass analysis, Auger electron spectroscopy, and other techniques in laboratories associated with the manufacturer of an instrument or in laboratories associated with semiconductor analysis or device production.

The fourth ARPA/NBS Workshop on Surface Analysis for Silicon Devices is being organized to determine the present qualitative and quantitative capabilities and future prospects of modern analytical beam techniques as applied to the analysis of silicon, and associated insulator films and device structures. Of particular interest are determinations of impurity profiles, surface contamination, and interface characteristics. Techniques utilizing impinging electron, ion, neutral, or photon beams will be considered. The workshop, scheduled for April 23 and 24 at NBS, Gaithersburg, is intended to foster discussions among analysts, users of their results, and instrument manufacturers.

Test Patterns Test patterns were the subject of the third ARPA/NBS Workshop held in Scottsdale following the September meeting of ASTM Committee F-1 on Electronics. About 70 scientists and engineers, representing 38 organizations, attended the workshop. Seven speakers from industry and government addressed various aspects of test pattern analysis and use. The Workshop was particularly

HIGHLIGHTS

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The CCD test pattern being developed by the Naval Electronics Laboratory Center with ARPA funding has been fabricated and the correlation of its test structures begun. The CCD can be connected and satisfactorily operated as an MOS capacitor, but some extraneous capacitance is observed in the inversion region of the CCD C-V characteristics. Threshold voltages and channel mobilities of the CCD structure connected as an MOS transistor agree reasonably well with those of an ordinary MOS transistor. Most importantly, the effectiveness of the circular CCD structure was demonstrated in connection with the direct determination of interface state density by the double-pulse method because the number of transfers is

The system is built around an oscilloscope in which the displayed waveform can be divided into 512 channels in the horizontal direction. In an associated memory each channel is represented by a 10-bit word which, together with the scale factor information for the oscilloscope input, defines the amplitude of the signal within that channel. Each 10-bit word can be stored in 6.5 μs, so that a waveform composed of 512 data points can be stored in less than 3.5 ms. An associated minicomputer, which has a 24,000 bit memory and computes with four significant figures, is able to process the stored waveforms as necessary. BASIC commands are available to activate and control programmable voltage and current supplies. A digital temperature indicator can also be interfaced with the system. Peripheral equipment includes a CRT display terminal, a hard copy unit which can copy whatever is displayed on the CRT, and a paper tape reader/punch.

not limited by the number of elements in the structure.

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A computer-controlled data acquisition and analysis system was received from the vendor in July. Following preliminary checkout and familiarization tests, the system was set up together with an automatic wafer prober to obtain real time wafer maps of base sheet resistance using the appropriate test structure on test pattern NBS-2. In addition the system has been used to acquire capacitance-voltage (C-V) data from a gated p-n junction and calculate and plot the dep ant density profile employing peripheral an diffused layer corrections; acquire C-V data from an MOS capacitor and calculate dopant density, flat-band voltage, and oxide charge density; and generate a curve of capacitance as a function of time for an MOS capacitor fabricated on an epitaxial specimen, fit the portions of the curve which represent relaration in the substrate and relaxation in the epitaxial layer, and calculate the layer thickness from the intersection of the two fits.

Photolithography

Work in the task which has been initiated to develop procedures fcr primary line width measurement calibrations, to provide calibrated line width measurement artifacts for use with optical microscopes, and to develop improved theory and experimental verification for accurate measurements with optical systems is currently be ing concentrated on construction of essential measurement equipment. A two directional interferometer is being designed and built for use in improving the line center to line center distance measurement between two parallel lines. A modified Beanett polarizing interferometer, which measures the movement of a mirror mounted on the stage of a scanning electron microscope (SEM) relative to a fiducial mirror by mea suring the angle of polarization of the light produced by the relative movement of the two mirrors is being constructed for prototype in situ measurements. In addition, measurements are being made both on a gold-nickel thin-line laminate designed for use in calibrating the magnification of an SEM and on commercially produced patterns of chromium lines on glass with both filar and image shearing attachments to a conventional microscope. This task was undertaken in response to particularly strong statements which have been received from the integrated circuits industry emphasizing the critical need for the development of NBS line width standards in the 1 um range to assist the

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tics of the laser flying spot scanner were asured and preliminary scans were made on group of devices which were also investited in the scanning electron microscope erating in the electron beam induced curent mode. A survey was initiated to deterne the state of activity within the seminductor device industry in the areas of -plication of laser scanning for wafer esting and other purposes, application of e SEM to topological inspection and elecical testing of silicon wafers, and study SEM-induced damage during inspection or st in order to establish directions of ture NBS work in these areas.

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Initial studies of a non-destructive acoustic emission test to determine the bond quality of beam-lead, flip-chip, or other gang bonded devices demonstrated the feasibility of this approach. Well bonded beamlead devices gave little or no noise while devices with one or two beams bonded to areas rendered intentionally defective gave noise bursts at applied test forces low enough not to deform the beams.

Two new bond test methods based on work carried out at NBS, a hot-melt-glue destructive pull test for beam-lead bonds and a nondestructive wire bond pull test, were prepared for ASTM Committee F-1 on Electronics. An intercomparison of the double-bond destructive pull test between NBS and another laboratory was conducted in preparation for a complete interlaboratory evaluation of this method.

Hermeticity Progress in conducting the interlaboratory evaluation of the helium mass spectrometer method for leak testing semiconductor devices and integrated circuits was delayed by difficulties encountered in the back pressurization phase. These difficulties were traced to outgassing of helium which diffused into the glass walls of the test leaks during pressurization and procedures for reducing this effect were developed.

The interlaboratory evaluation of the radioisotope method for leak testing semiconductor devices is proceeding as scheduled.

Thermal Properties of Devices A modified emitter-only-switching thermal resistance test circuit was successfully used to separate thermal effects of the input and output transistors of a monolithic Darlington circuit. This simple two-transistor circuit is an elemental integrated circuit in that leads to all regions of each device are not available at the exterior terminals so that it is not possible to measure all desired junction voltages independently; hence 10calization of effects to a particular device must be inferred from the results of several measurements made under different conditions.

A method was developed for estimating peak junction temperature from the electrically generated heating and cooling response of medium power transistors. Results obtained on several transistors showed good agreement with peak junction temperatures measured by an infrared microradiometer.

LIST OF FIGURES

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Cross sectional view of holder designed for the determination of dopant density profiles by the incremental sheet resistance method . . .

Electron density on gold acceptors in the space-charge region of a silicon pn junction

Schematic representation of the distribution of charge throughout the
space-charge region of a pn junction during the discharge of electrons from
uniformly distributed acceptor defects

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Calculated reduced thermally stimulated current, I1 (p+n)/qAW_N ̧ from gold
acceptor defects in a silicon pn junction as a function of temperature for
B = 10 K/s, W1 = 0, and several values of the ratio N/N
Calculated reduced thermally stimulated current, I1(pn)/qAW N., from gold
acceptor defects in a silicon pn junction as a function of temperature for
Wb = 0,

=

=0, Na/Nt 100, and several values of B.

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Calculated reduced thermally stimulated current, 12(p*n)/qAW N, from gold
acceptor defects in a silicon pn junction as a function of temperature for
B = 10 K/s, Na/Nt
100, and several values of g..

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Emission temperature of the phase I current response of gold acceptor defects
in n-type silicon as a function of heating rate for various conditions
Hall effect activation energy plot for the gold donor in initially n-type
silicon converted to p-type by diffusion with gold

Experimental data and theoretical curves for determining the energy level
of the gold acceptor in initially n-type silicon converted to p-type by
diffusion with gold .

X-ray photoelectron spectra of carbon, silicon, and oxygen from an
air-stabilized silicon specimen

Relative areas of x-ray photoelectron spectral peaks as a function of
electron emission angle

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Ratios of the relative areas of the x-ray photoelectron peaks due to
carbon and silicon as a function of electron emission angle

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13. Relative areas of x-ray photoelectron spectral peaks of cleaned silicon surface heated in an ultralow pressure of oxygen as a function of heater current and ratio of relative areas of the peaks due to carbon

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14. Test pattern, NBS-3, for characterizing the resistivity-dopant density relation in silicon .

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A topographic view and cross section of an n-channel, three-phase,
aluminum-gate CCD .

High-frequency capacitance-voltage characteristics of a p-MOS capacitor
and an n-channel, 32-bit CCD connected as an MOS capacitor

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Pulse height of a "one" preceded by 9 zeros as a function of the number
of transfers around a 32-bit circular CCD operating at 125 kHz
Fractional charge loss per transfer from a "one" preceded by N zeros
and transferred 336 times around a 32-bit circular CCD operating at 125 kHz
Fractional charge loss from a "one" preceded by N zeros as a function
of the number of transfers around a 32-bit circulaf CCD operating at 125 kHz
Electron beam induced current response and unmodulated 0.633-um laser beam
induced current response of a 0.76-mm square, unbiased, silicon p-n
junction diode

LIST OF FIGURES

Measured and calculated normalized vibration amplitudes of ultrasonic bonding tools mounted in inverted positions . . .

Beam-lead force indicator as supplied with the beam-lead bonder

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. Modified beam-lead force gauge assembly . .

. Block diagram of acoustic emission test system

Indicated leak rate for sealed-off borosilicate glass capsules of same
outer dimensions as test leak capsules as a function of time after pressuri-
zation at 75 psia for 20 h in helium.

. Commercially available Darlington circuits

· Circuit diagram of emitter-only switching circuit for measuring thermal resistance modified to allow use of a variety of junction voltages as temperature sensitive parameters

Model used for simulating the way in which the emitter-base voltage averages the junction temperature . .

Temperature and relative measurement current density along a diagonal of
a 0.51-шm square heat source on a 2.54-mm square silicon chip . .
The computed ratio of the average junction temperature to the peak
junction temperature as a function of heat source size for a 2.54-mm
square silicon chip corrected to account for the increased measurement
current density compared to the calibration current density .

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Specimens for the Comparative Study of Surface Analysis Techniques
Planar Test Structures on Test Pattern NBS-3

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