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6.2

MOS Transistor (Circular), Structure 4.15 . 6.3 MOS Transistor, Structure 4.16

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Miscellaneous

7.5

Alignment Markers for Negative Photoresist, Structure 4.4 N
Alignment Markers for Positive Photoresist, Structure 4.4 P
NBS Logo, Structure 4.6 ..

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Surface Profilometer Structure, Structure 4.34

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Etch-Control Structures, Structures 4.36 B, E, C, M, BC,

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7.6 Resolution Structures, Structures 4.37 B, E, C, M, BC, G

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References

. 27

Appendix

28

LIST OF FIGURES

1.

Test pattern NBS-4 fabricated with BASE (B), EMITTER (E) BASE-
CONTACT (BC), CONTACT (C), and METAL (M) masks

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An illustration of the notation used in views of a test structure

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5.

BASE-CONTACT mask for quadrant 1 of test pattern NBS-4

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EMITTER mask for quadrant 1 of test pattern NBS-4
GATE mask for quadrant 1 of test pattern NBS-4

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CONTACT mask for quadrant 1 of test pattern NBS-4
METAL mask for quadrant 1 of test pattern NBS-4
Quadrant 2 of test pattern NBS-4

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BASE mask for quadrant 2 of test pattern NBS-4
BASE-CONTACT mask for quadrant 2 of test pattern NBS-4

13. EMITTER mask for quadrant 2 of test pattern NBS-4

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GATE mask for quadrant 2 of test pattern NBS-4 .
CONTACT mask for quadrant 2 of test pattern NBS-4

METAL mask for quadrant 2 of test pattern NBS-4
Quadrant 3 of test pattern NBS-4 .

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BASE mask for quadrant 3 of test pattern NBS-4
BASE-CONTACT mask for quadrant 3 of test pattern NBS-4
EMITTER mask for quadrant 3 of test pattern NBS-4
GATE mask for quadrant 3 of test pattern NBS-4
CONTACT mask for quadrant 3 of test pattern NBS-4
METAL mask for quadrant 3 of test pattern NBS-4
Quadrant 4 of test pattern NBS-4

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BASE mask for quadrant 4 of test pattern NBS-4
BASE-CONTACT mask for quadrant 4 of test pattern NBS-4
EMITTER mask for quadrant 4 of test pattern NBS-4
GATE mask for quadrant 4 of test pattern NBS-4
CONTACT mask for quadrant 4 of test pattern NBS-4
METAL mask for quadrant 4 of test pattern NBS-4

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PREFACE

The work was conducted as part of the Semiconductor Technology Program at the National Bureau of Standards. Portions of this work were supported by the Defense Advanced Research Projects Agency (Order No. 2397) and the NBS.

In the semiconductor industry it is common practice to design photomasks in English units. The photomasks used in this study were laid out in English units. The equivalent metric unit is given in parentheses; in some cases the equivalent is rounded off to an appropriate number of significant figures.

The authors wish to thank several members of the Electronic Technology Division for their assistance. Y. M. Liu developed the wafer fabrication processes, W. A. Cullins prepared most of the drawings, Cindy Cannon photographed the wafers and masks, and Jane Walters typed the manuscript.

MICROELECTRONIC TEST PATTERN NBS-4

by

W. Robert Thurber and Martin G. Buehler

Abstract: Microelectronic test pattern NBS-4 is a revision of test pattern NBS-3 which was designed primarily for evaluation of the resistivity-dopant density relationship in silicon. Major changes include the addition of optional BASECONTACT and GATE masks and the incorporation of several new structures, some useful for the resistivity-dopant density. work, and others, mostly sheet resistors, included for evaluation of new designs.

The NBS-4 pattern contains 38 test structures such as planar
four-probe resistors, sheet resistors, MOS capacitors, p-n
junctions, bipolar and MOS transistors, Hall effect device,
and process control structures. The overall pattern is a
square 200 mil (5.08 mm) on a side and is divided into four
quadrants which are separated by scribe lines. A detailed
layout of each structure is presented including both a top
view and a cross sectional view. Photomicrographs of each
quadrant and the quadrants of the six masks used in the fab-
rication of the pattern are shown in an appendix.

Key Words: Dopant density; microelectronics; MOS
capacitors; n-p-n transistor fabrication; p-n junctions;
resistivity; semiconductor electronics; sheet resistors;
silicon; test pattern; test structures.

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The purpose of this report is to describe the microelectronic test structures found on test pattern NBS-4. This is accomplished primarily by drawings of the structures, supplemented by photomicrographs of the masks and fabricated wafers. Test pattern NBS-4 is a revision of test pattern NBS-3 [1] which was designed for study of the resistivity-dopant density relationship in silicon. Significant changes include the addition of optional BASE-CONTACT and GATE masks and the incorporation of new structures for the resistivity-dopant density work and for the measurement of sheet resistance. The pattern is composed of an array of 38 test structures, such as planar four-probe resistors, sheet resistors, MOS capacitors, p-n junctions, bipolar and MOS transistors, Hall effect device, and process control structures, which for the most part are adaptations of commonly used configurations. Table 1 gives a list of the test structures, their purpose, and one or more references with details on their use. A majority of the structures are the same, or very similar, to ones on test pattern NBS-3, and the publication [1] on that pattern includes discussion of each structure, equations for calculation of the quantities determined by each, and additional references.

The devices specifically designed for the resistivity-dopant density evaluation are indicated by an asterisk in table 1. The square array four-probe resistor [2] has proven to be the best structure for resistivity measurements, and four structures of the same basic design, differing only in the size of the collector pipes, were added as part of NBS-4. Two new MOS capacitor structures were added for dopant density measurements. These devices are designed for steady-state, deep-depletion, capacitance-voltage measurements. Bulk dopant density values can be obtained from the following structures: MOS capacitors (4.2, 4.3, and 4.8), base-collector diode (4.10), MOSFET

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= structures designed for resistivity-dopant density evaluation.

aB = bridge; CS = channel stop; DGR = diffused guard ring; FP = field plate; L = length along current path; VDP = van der Pauw; W = width of current path.

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= BASE mask; BC= BASE-CONTACT mask; C = CONTACT mask; E = EMITTER mask; G = GATE måsk; M = METAL mask.

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