LIST OF ILLUSTRATIONS (Continued)

Figure

10.

Scanning electron micrograph (2400X, 30°) of demarcation-
etched stress cracks. Sample as defined in figures 8 and

9.

Page

11.

No cracks exist in overcoated oxide layer between
aluminum patterns
Scanning electron micrograph (4800X, 30°) showing a differ-
ent area of sample from figure 10. Gray channel areas are
caused by differences in charging due to etched-out alu-
minum under glass

21

22

12.

13.

14.

15.

Glass microcracks in sample shown in figures 8, 10 and 11
as observed by SEM at 4800X and 30° from the perpendicular.
Width of crack from this high-magnification photograph is
approximately 0.2 μm.

Cross section SEM of a demarcation-etched structure.
Sample consisted of a stress-cracked CVD PSG passivation
layer over aluminum on oxidized silicon. Cavity formed in
aluminum by selective etching underneath glass exhibits
curved side walls caused by normal isotropic etching
Optical photomicrographs of microcrack in a continuous
1.2-um-thick silicon dioxide film over aluminum-metallized
linear bipolar IC wafer. Large light area is a metallized
capacitor of 430 um length (150X, brightfield).

(a) - Untreated sample; fine microcracks are just barely
visible.

(b)

(c)

Demarcation-etched in aluminum etch at 50°C by an
etch time factor of 1.25; crack pattern over aluminum
areas is now readily visible. Previously nondetect-
able defects in smaller metal areas can now be seen.
Additionally etched sample corresponding to an etch
time factor of 2.5; cracks along the periphery of
the metal areas have now become visible.

Etch time factor of 5.0; peripheral crack demarcations
are seen to be 1/2 the width of the inside area bands,
indicating that they occur exactly along edge of
pattern. Portions of one interconnect line are seen
to be the only undamaged parts in this sample area.
Differences in the width of the inside demarcation
bands in various areas seem to indicate differences
in width of the crack, affecting the rate of demar-
cation etching . .

Detailed optical photomicrographs of demarcation-etched
glass cracks. (a)-same as figure 14 (c) but at 2.6X higher
magnification. (b)-same as figure 14 (d) but at 2.6x
higher magnification

23

24

26

29

LIST OF ILLUSTRATIONS (Continued)

Figure

16. Optical photomicrograph of pinholes in a PSG layer over
aluminum as a function of increasing etch time factor:
(a)-0; (b)-1.25; (c)-2.5, and (d)-5.0. It is seen that
no new pinholes become demarcated beyond a factor of 1.25.
Small size demarcations (indicating small pinholes) in-
crease much more slowly in size on continued etching than
longer ones, indicating that the rate of demarcation
growth depends on the defect size, as noted for micro-
cracks (385X, brightfield) . .

17.

18.

19.

20.

Developed partial pinholes in PSG passivation layer over
aluminum interconnect pattern of an IC. These latent
pinholes exposed the aluminum after 50% of the glass coat-
ing was removed by selective etching (385X, bright field)
Developed thin edge coverage of PSG over edges of aluminum
interconnect of an IC. The aluminum line edges became ex-
posed in many places after 50% of the glass coating was
removed by selective etching (385X, brightfield) . .
Schematic of electrophoretic decoration apparatus
Photoresist mask showing negative/positive precision pat-
tern used in defect decoration resolution measurements.
Thinnest line is 1 μm (121X)

21. Micrograph of glass particles deposited on mesa-type wafer.
The thermal oxide is 1.2 μm thick, and the groove width is
0.4 mm. (a) Deposition at 50 V for 8 min. (b) Deposition
at 200 V for 2 min (20x)

22.

Zinc oxide powder deposited by electrophoresis on thermal
silicon dioxide showing pinhole decoration and background
deposition. The deposition was done at 10 V for 30 s.
The deposits decorating the pinholes are about 10 um in
diameter (400X)

Page

30

36

37

39

41

45

46

23.

Micrograph of zinc silicate phosphor deposited on defect
on IC wafer. Deposition was done at 25 V for 10 min.
(100X, brightfield) .

46

24.

Plot of current vs time for bare silicon wafer and silicon
dioxide-covered wafer, for a suspension of lead alumino-
silicate glass particles with petroleum barium sulfonate
in C2C13F3. Also shown is the time dependence for bare
silicon after the glass has settled out

48

25. Plot of charge transported vs applied voltage for silicon dioxide-coated wafer. The suspension is the same as for figure 24. Sulfonate content was 0.1% to C2C13F3 by volume for the points and 0.2% for the points

49

Figure

26.

27.

28.

LIST OF ILLUSTRATIONS (Continued)

Page

50

52

Plot of glass deposited on silicon dioxide-coated wafers as
function of concentration of petroleum barium sulfonate .
Schematic of corona charging process.

Oxide surface voltage charged to saturation vs area of
oxide-covered surface. Oxide thickness is 10,000 X

54

29.

Oxide surface voltage charged to saturation vs oxide thick-
ness for oxide-covered area of 1.7

mm2

54

30.

31.

Oxide surface voltage charged to saturation vs voltage of
corona wires for oxide 10,000 & thick and area of 1.7 mm2
Oxide surface voltage charged to saturation vs distance from
wafer to corona wires at 10 kV for oxide 10,000 Å thick
and area of 1.7 mm

32.

57

33.

34.

35.

36.

Oxide surface voltage decay in first minute after charging
vs relative humidity

Direct decoration of defects after corona charging of
insulator regions with ions of same sign as decorating
particles in suspension .

(a) and (b)-Phosphor deposition at 10,000 V charging
voltage showing excellent crack detection. Not all isolated
phosphor deposits correspond to pinholes at this high
voltage. (150X, uv and brightfield). (c)-Phosphor deposi-
tion at relatively low charging voltage (6000 V). Note that
cracks and large defects are detected by the phosphor (150x,
and brightfield illumination). (d)-Sample from (c)
after phosphor stripping followed by selective aluminum
etching (15 min 50°C), (150X, brightfield) ..

(a)-Phosphor decoration at a charging potential of 6000 V
prior to aluminum etching (150X, uv and brightfield
illumination).

(b)-Sample from (a) after phosphor stripping followed by
aluminum etching (5 min 80°C). The triangle encloses a
defect detected by etching which had not been decorated
by the phosphor

Corresponding photomicrographs of a glass-overcoated linear
bipolar IC with stress-induced microcracks depicting two
aluminum-metallized capacitor areas (a) and (b); (1) Samples
before treatments, as seen under brightfield illumination
(~100x). (2) Same samples electrophoretically decorated
with ZnSi04:Mn phosphor B, as seen in uv and brightfield
illumination (~100X). (3) Same sample after stripping
phosphor followed by 5-min aluminum etching at 50°C
(~100X) .

59

60-61

62

64

Figure

LIST OF ILLUSTRATIONS (Continued)

37.

38.

(a)-Electrophoretic phosphor decoration of negative/positive
precision test pattern etched into 5000 A of thermally
grown Si02 on silicon. Thinnest line width is 1 um (78.5X,

uv illumination).

(b)-Same pattern as (a), showing feasibility of decorating
"partial" pinholes or thin spots. In this case, 1000 X of
CVD SiO2 was deposited over the same etched pattern used
for (a) to simulate 1000-A-thick-thin spots over silicon.
The pattern (except the narrowest line) has become decorat-
ed, but with a lower quantity of phosphor

ZnSi04:Mn phosphor deposited along cracks in 15,000-A CVD
Si02 layer over IC wafer exposed to humid ambient (RH =
62%) for 2 s between charging and deposition (150X, bright-
field with uv irradiation)

Page

66

67

39.

Reverse decoration of defects after corona charging of in-
sulator regions with ions of opposite sign to that of
decorating particles in suspension . .

68

40.

41.

Carbon black deposited on device to reverse-decorate the
defects. High contrast renders microscopic evaluation
fast and sensitive. Width of narrowest aluminum lines
(visible at right) is about 12 μm (150x) . . . .
Confirmation of defect detection by the reverse-decoration
method. Sample was aluminum-etched at 50°C for 5 min with-
out removing carbon black. (a) 385X, (b) 760X ..

71

72

42.

Carbon black deposition with high threshold voltage in (a)
compared to one with low threshold voltage in (b);
(150X, brightfield).

73

43.

Carbon black reverse-decoration as function of time delay
between charging and deposition. The time delays are

(a) 4 s, (b) 10 s, (c) 120 s. Corona potential was +7000
V dc (78.5X, bright field) .

75

44.

45.

Schematic of microscope use for obtaining image of source
field stop at photocell for reflected light measurements . .
Selectively demarcation-etched area pinholes in a defective
passivation test layer over an aluminum-metallized IC
(760X) . . .

79

85

46.

Selectively demarcation-etched edge pinholes in a defective
passivation test layer over an aluminum-metallized IC.
Particulates are surface impurities left from plastic de-
capsulation processing (385X)

85

LIST OF ILLUSTRATIONS (Continued)

Page

Figure

47.

48.

49.

50.

86

Variety of selectively demarcation-etched area and edge
pinholes in a rf plasma-deposited silicon nitride pas-
sivation layer over an aluminum-metallized IC (385X)
Variety of selectively demarcation-etched area and edge
pinholes in a rf plasma-deposited silicon nitride
passivation layer over a gold-metallized IC (150X)
Sequentially metal/glass-etched aluminum-metallized and
glass-passivated IC showing numerous pinholes that were
opened on glass etching (150X)

87

Density of open and partial pinholes as a function of
glass composition and layer depth. Samples used were ex-
perimental aluminum-metallized IC overcoated with 1.15-um
CVD Si02 or PSG. The residual layer thickness are 1.15,
0.86, 0.58, and 0.29 uμm

51. Carbon black deposited on CMOS SOS device wafer showing
defects in passivation layer (385X, bright field).

88

89

91

52. Example of cracking at edges of large aluminum areas due to
extreme heat treatment. (a)-Cracks outlined by carbon
black (150X, bright field), (b)-SEM cannot detect cracks
(20,000x), (c)-After 10-s buffered hydrofluoric acid etching,
the SEM does resolve the cracks (20,000X)

92